/*!
    \file    change log.txt
    \brief   change log for GD32F4xx firmware

    \version 2025-08-08, V3.3.2, firmware for GD32F4xx
*/

/*
    Copyright (c) 2025, GigaDevice Semiconductor Inc.

    Redistribution and use in source and binary forms, with or without modification, 
are permitted provided that the following conditions are met:

    1. Redistributions of source code must retain the above copyright notice, this 
       list of conditions and the following disclaimer.
    2. Redistributions in binary form must reproduce the above copyright notice, 
       this list of conditions and the following disclaimer in the documentation 
       and/or other materials provided with the distribution.
    3. Neither the name of the copyright holder nor the names of its contributors 
       may be used to endorse or promote products derived from this software without 
       specific prior written permission.

    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
OF SUCH DAMAGE.
*/

******************* V3.3.2 2025-08-08 ******************************************************************************************
______________________Common______________________________________________________________________________________________

_______________________________________________________________________________________________________________________

________________________Module ADC _______________________________________________________________________________________

__________________________________________________________________________________________________________________________

______________________ADTIMER_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________BKP_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________BL0TIMER____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________BL1TIMER____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CAN_________________________________________________________________________________________________
../Firmware/GD32F4xx_standard_peripheral/Source/gd32f4xx_can.c
fix reason:
When the number of bytes sent by CAN exceeds 8, the frame sent by CAN to the bus will have a problem.

V3.3.1:
uint8_t can_message_transmit(uint32_t can_periph, can_trasnmit_message_struct *transmit_message)
{
    uint8_t mailbox_number = CAN_MAILBOX0;

    /* select one empty mailbox */
    if(CAN_TSTAT_TME0 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME0)) {
        mailbox_number = CAN_MAILBOX0;
    } else if(CAN_TSTAT_TME1 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME1)) {
        mailbox_number = CAN_MAILBOX1;
    } else if(CAN_TSTAT_TME2 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME2)) {
        mailbox_number = CAN_MAILBOX2;
    } else {
        mailbox_number = CAN_NOMAILBOX;
    }
    /* return no mailbox empty */
    if(CAN_NOMAILBOX == mailbox_number) {
        return CAN_NOMAILBOX;
    }

    CAN_TMI(can_periph, mailbox_number) &= CAN_TMI_TEN;
    if(CAN_FF_STANDARD == transmit_message->tx_ff) {
        /* set transmit mailbox standard identifier */
        CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_SFID(transmit_message->tx_sfid) | \
                                               transmit_message->tx_ft);
    } else {
        /* set transmit mailbox extended identifier */
        CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_EFID(transmit_message->tx_efid) | \
                                               transmit_message->tx_ff | \
                                               transmit_message->tx_ft);
    }
    /* set the data length */
    CAN_TMP(can_periph, mailbox_number) &= ~CAN_TMP_DLENC;
    CAN_TMP(can_periph, mailbox_number) |= transmit_message->tx_dlen;
    /* set the data */
    CAN_TMDATA0(can_periph, mailbox_number) = TMDATA0_DB3(transmit_message->tx_data[3]) | \
            TMDATA0_DB2(transmit_message->tx_data[2]) | \
            TMDATA0_DB1(transmit_message->tx_data[1]) | \
            TMDATA0_DB0(transmit_message->tx_data[0]);
    CAN_TMDATA1(can_periph, mailbox_number) = TMDATA1_DB7(transmit_message->tx_data[7]) | \
            TMDATA1_DB6(transmit_message->tx_data[6]) | \
            TMDATA1_DB5(transmit_message->tx_data[5]) | \
            TMDATA1_DB4(transmit_message->tx_data[4]);
    /* enable transmission */
    CAN_TMI(can_periph, mailbox_number) |= CAN_TMI_TEN;

    return mailbox_number;
}

V3.3.2:
uint8_t can_message_transmit(uint32_t can_periph, can_trasnmit_message_struct *transmit_message)
{
    uint8_t mailbox_number = CAN_MAILBOX0;

    /* select one empty mailbox */
    if(CAN_TSTAT_TME0 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME0)) {
        mailbox_number = CAN_MAILBOX0;
    } else if(CAN_TSTAT_TME1 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME1)) {
        mailbox_number = CAN_MAILBOX1;
    } else if(CAN_TSTAT_TME2 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME2)) {
        mailbox_number = CAN_MAILBOX2;
    } else {
        mailbox_number = CAN_NOMAILBOX;
    }
    /* return no mailbox empty */
    if(CAN_NOMAILBOX == mailbox_number) {
        return CAN_NOMAILBOX;
    }

    CAN_TMI(can_periph, mailbox_number) &= CAN_TMI_TEN;
    if(CAN_FF_STANDARD == transmit_message->tx_ff) {
        /* set transmit mailbox standard identifier */
        CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_SFID(transmit_message->tx_sfid) | \
                                               transmit_message->tx_ft);
    } else {
        /* set transmit mailbox extended identifier */
        CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_EFID(transmit_message->tx_efid) | \
                                               transmit_message->tx_ff | \
                                               transmit_message->tx_ft);
    }
    /* set the data length */
    CAN_TMP(can_periph, mailbox_number) &= ~CAN_TMP_DLENC;
    
    /* Classic CAN frame data lenth does not exceed 8 */
    if (transmit_message->tx_dlen > 8U) {
        transmit_message->tx_dlen = 8U;
    }
    
    CAN_TMP(can_periph, mailbox_number) |= transmit_message->tx_dlen;
    /* set the data */
    CAN_TMDATA0(can_periph, mailbox_number) = TMDATA0_DB3(transmit_message->tx_data[3]) | \
            TMDATA0_DB2(transmit_message->tx_data[2]) | \
            TMDATA0_DB1(transmit_message->tx_data[1]) | \
            TMDATA0_DB0(transmit_message->tx_data[0]);
    CAN_TMDATA1(can_periph, mailbox_number) = TMDATA1_DB7(transmit_message->tx_data[7]) | \
            TMDATA1_DB6(transmit_message->tx_data[6]) | \
            TMDATA1_DB5(transmit_message->tx_data[5]) | \
            TMDATA1_DB4(transmit_message->tx_data[4]);
    /* enable transmission */
    CAN_TMI(can_periph, mailbox_number) |= CAN_TMI_TEN;

    return mailbox_number;
}
__________________________________________________________________________________________________________________________

______________________CAU_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CEC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CFMU________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CLA_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CLTCFG______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CMP_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CPDM________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CRC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CTC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DAC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DBG_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DBGSYS______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DCI_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DCM_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DMA_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DMAMUX______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________EDOUT_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________EFUSE_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________ENET________________________________________________________________________________________________

_____________________________________________________________________________________________________________________

______________________EVIC________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________EXMC________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________EXTI________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________FAC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________FFT_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________FMC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________FMU_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________GPIO________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________GPTIMER_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________GTOC________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________GTOC________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________GPTIMER_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________GTOC________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HPDF________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_CAU_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_DMA_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_HAU_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_IF______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_PKCAU___________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_RCU_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_SM2_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_SM3_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_SM4_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_Timer___________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_TRNG____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_WDGT____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HWSEM_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________I2C_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________ICACHE______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________IFRP________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________IOC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________IPA_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________IREF________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________IRM_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________IVREF_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________LIN_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________LPDTS_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________LPTIMER_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________LPUSART_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________MCMU________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________MDIO________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________MDMA________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________MFCOM_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________MTC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________OPA_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________OSPI________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________OSPIM_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________PKCAU_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________PMU_________________________________________________________________________________________________
../Firmware/GD32f4xx_standard_peripheral/Source/gd32f4xx_pmu.c
fix reason:
Modifying the pmu_to_sleepmode() function to enter sleep with WFE requires one SEV instruction and two WFE instructions
V3.3.1:
void pmu_to_sleepmode(uint8_t sleepmodecmd)
{
    /* clear sleepdeep bit of Cortex-M4 system control register */
    SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);

    /* select WFI or WFE command to enter sleep mode */
    if(WFI_CMD == sleepmodecmd) {
        __WFI();
    } else {
        __WFE();
    }
V3.3.2:
void pmu_to_sleepmode(uint8_t sleepmodecmd)
{
    /* clear sleepdeep bit of Cortex-M4 system control register */
    SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);

    /* select WFI or WFE command to enter sleep mode */
    if(WFI_CMD == sleepmodecmd) {
        __WFI();
    } else {
        __SEV();
        __WFE();
        __WFE();
    }
}
__________________________________________________________________________________________________________________________

______________________POC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________QSPI________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________RAMECCMU____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________RCU_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________RSPDIF______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________RTC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________RTDEC_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SAI_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SDIO________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SENT________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SHRTIMER____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SLCD________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SPI_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SQPI________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________STCM________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SVPWM_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SYSTEM______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TIMER_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TLI_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TMU_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TRIGSEL_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TRNG________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TSI_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TZPCU_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________USART_______________________________________________________________________________________________

_______________________________________________________________________________________________________________________

______________________USBD________________________________________________________________________________________________
../Firmware/GD32f4xx_usb_library/device/core/Source/usbd_core.c
../Firmware/GD32f4xx_usb_library/device/core/Source/usbd_enum.c
fix reason:
CVTest testing through self-powered supply.
V3.3.1:
1.
static usb_reqsta _usb_std_getstatus(usb_core_driver *udev, usb_req *req)
{
    uint8_t recp = BYTE_LOW(req->wIndex);
    usb_reqsta req_status = REQ_NOTSUPP;
    usb_transc *transc = &udev->dev.transc_in[0];

    static uint8_t status[2] = {0U};

    switch(req->bmRequestType & (uint8_t)USB_RECPTYPE_MASK) {
    case USB_RECPTYPE_DEV:
        if(((uint8_t)USBD_ADDRESSED == udev->dev.cur_status) || \
                ((uint8_t)USBD_CONFIGURED == udev->dev.cur_status)) {

            if(udev->dev.pm.power_mode) {
                status[0] = USB_STATUS_SELF_POWERED;
            } else {
                status[0] = 0U;
            }

            if(udev->dev.pm.dev_remote_wakeup) {
                status[0] |= USB_STATUS_REMOTE_WAKEUP;
            } else {
                status[0] = 0U;
            }

            req_status = REQ_SUPP;
        }
        break;

    case USB_RECPTYPE_ITF:
        if(((uint8_t)USBD_CONFIGURED == udev->dev.cur_status) && (recp <= USBD_ITF_MAX_NUM)) {
            req_status = REQ_SUPP;
        }
        break;

    case USB_RECPTYPE_EP:
        if((uint8_t)USBD_CONFIGURED == udev->dev.cur_status) {
            if(0x80U == (recp & 0x80U)) {
                status[0] = udev->dev.transc_in[EP_ID(recp)].ep_stall;
            } else {
                status[0] = udev->dev.transc_out[recp].ep_stall;
            }

            req_status = REQ_SUPP;
        }
        break;

    default:
        break;
    }

    if(REQ_SUPP == req_status) {
        transc->xfer_buf = status;
        transc->remain_len = 2U;
    }

    return req_status;
}
2.
void usbd_init(usb_core_driver *udev, usb_core_enum core, usb_desc *desc, usb_class_core *class_core)
{
    udev->dev.desc = desc;

    /* class callbacks */
    udev->dev.class_core = class_core;

    /* create serial string */
    serial_string_get(udev->dev.desc->strings[STR_IDX_SERIAL]);

    /* configure USB capabilities */
    (void)usb_basic_init(&udev->bp, &udev->regs, core);

    usb_globalint_disable(&udev->regs);

    /* initializes the USB core*/
    (void)usb_core_init(udev->bp, &udev->regs);

    /* set device disconnect */
    usbd_disconnect(udev);

#ifndef USE_OTG_MODE
    usb_curmode_set(&udev->regs, DEVICE_MODE);
#endif /* USE_OTG_MODE */

    /* initializes device mode */
    (void)usb_devcore_init(udev);

    usb_globalint_enable(&udev->regs);

    /* set device connect */
    usbd_connect(udev);

    udev->dev.cur_status = (uint8_t)USBD_DEFAULT;
}

V3.3.2:
1.
static usb_reqsta _usb_std_getstatus(usb_core_driver *udev, usb_req *req)
{
    uint8_t recp = BYTE_LOW(req->wIndex);
    usb_reqsta req_status = REQ_NOTSUPP;
    usb_transc *transc = &udev->dev.transc_in[0];

    static uint8_t status[2] = {0U};

    switch(req->bmRequestType & (uint8_t)USB_RECPTYPE_MASK) {
    case USB_RECPTYPE_DEV:
        if(((uint8_t)USBD_ADDRESSED == udev->dev.cur_status) || \
                ((uint8_t)USBD_CONFIGURED == udev->dev.cur_status)) {

            if(udev->dev.pm.power_mode) {
                status[0] = USB_STATUS_SELF_POWERED;
            } else {
                status[0] = 0U;
            }

            if(udev->dev.pm.dev_remote_wakeup) {
                status[0] |= USB_STATUS_REMOTE_WAKEUP;
            }

            req_status = REQ_SUPP;
        }
        break;

    case USB_RECPTYPE_ITF:
        if(((uint8_t)USBD_CONFIGURED == udev->dev.cur_status) && (recp <= USBD_ITF_MAX_NUM)) {
            req_status = REQ_SUPP;
        }
        break;

    case USB_RECPTYPE_EP:
        if((uint8_t)USBD_CONFIGURED == udev->dev.cur_status) {
            if(0x80U == (recp & 0x80U)) {
                status[0] = udev->dev.transc_in[EP_ID(recp)].ep_stall;
            } else {
                status[0] = udev->dev.transc_out[recp].ep_stall;
            }

            req_status = REQ_SUPP;
        }
        break;

    default:
        break;
    }

    if(REQ_SUPP == req_status) {
        transc->xfer_buf = status;
        transc->remain_len = 2U;
    }

    return req_status;
}
2.
void usbd_init(usb_core_driver *udev, usb_core_enum core, usb_desc *desc, usb_class_core *class_core)
{
    udev->dev.desc = desc;

    /* class callbacks */
    udev->dev.class_core = class_core;

    /* create serial string */
    serial_string_get(udev->dev.desc->strings[STR_IDX_SERIAL]);

     /* configure power management */
    udev->dev.pm.power_mode = (udev->dev.desc->config_desc[7] & BIT(6)) >> 6;

    /* configure USB capabilities */
    (void)usb_basic_init(&udev->bp, &udev->regs, core);

    usb_globalint_disable(&udev->regs);

    /* initializes the USB core*/
    (void)usb_core_init(udev->bp, &udev->regs);

    /* set device disconnect */
    usbd_disconnect(udev);

#ifndef USE_OTG_MODE
    usb_curmode_set(&udev->regs, DEVICE_MODE);
#endif /* USE_OTG_MODE */

    /* initializes device mode */
    (void)usb_devcore_init(udev);

    usb_globalint_enable(&udev->regs);

    /* set device connect */
    usbd_connect(udev);

    udev->dev.cur_status = (uint8_t)USBD_DEFAULT;
}

../Firmware/GD32f4xx_usb_library/driver/Source/drv_usb_dev.c
fix reason:
Fix the issue where the enum_speed parameter may cause an array out-of-bounds error.
V3.3.1:
1.
usb_status usb_transc0_active(usb_core_driver *udev, usb_transc *transc)
{
    __IO uint32_t *reg_addr = NULL;

    uint8_t enum_speed = udev->regs.dr->DSTAT & DSTAT_ES;

    /* get the endpoint number */
    uint8_t ep_num = transc->ep_addr.num;

    if(ep_num) {
        /* not endpoint 0 */
        return USB_FAIL;
    }

    if(transc->ep_addr.dir) {
        reg_addr = &udev->regs.er_in[0]->DIEPCTL;
    } else {
        reg_addr = &udev->regs.er_out[0]->DOEPCTL;
    }

    /* endpoint 0 is activated after USB clock is enabled */
    *reg_addr &= ~(DEPCTL_MPL | DEPCTL_EPTYPE | DIEPCTL_TXFNUM);

    /* set endpoint 0 maximum packet length */
    *reg_addr |= EP0_MAXLEN[enum_speed];

    /* activate endpoint */
    *reg_addr |= ((uint32_t)transc->ep_type << 18U) | ((uint32_t)ep_num << 22U) | DEPCTL_SD0PID | DEPCTL_EPACT;

    return USB_OK;
}

2.
usb_status usb_transc_active(usb_core_driver *udev, usb_transc *transc)
{
    __IO uint32_t *reg_addr = NULL;
    uint32_t epinten = 0U;
    uint8_t enum_speed = udev->regs.dr->DSTAT & DSTAT_ES;

    /* get the endpoint number */
    uint8_t ep_num = transc->ep_addr.num;

    /* enable endpoint interrupt number */
    if(transc->ep_addr.dir) {
        reg_addr = &udev->regs.er_in[ep_num]->DIEPCTL;

        epinten = 1U << ep_num;
    } else {
        reg_addr = &udev->regs.er_out[ep_num]->DOEPCTL;

        epinten = 1U << (16U + ep_num);
    }

    /* if the endpoint is not active, need change the endpoint control register */
    if(!(*reg_addr & DEPCTL_EPACT)) {
        *reg_addr &= ~(DEPCTL_MPL | DEPCTL_EPTYPE | DIEPCTL_TXFNUM);

        /* set endpoint maximum packet length */
        if(0U == ep_num) {
            *reg_addr |= EP0_MAXLEN[enum_speed];
        } else {
            *reg_addr |= transc->max_len;
        }

        /* activate endpoint */
        *reg_addr |= ((uint32_t)transc->ep_type << 18U) | ((uint32_t)ep_num << 22U) | DEPCTL_SD0PID | DEPCTL_EPACT;
    }

#ifdef USB_HS_DEDICATED_EP1_ENABLED
    if((1U == ep_num) && (USB_CORE_ENUM_HS == udev->bp.core_enum)) {
        udev->regs.dr->DEP1INTEN |= epinten;
    } else
#endif /* USB_HS_DEDICATED_EP1_ENABLED */
    {
        /* enable the interrupts for this endpoint */
        udev->regs.dr->DAEPINTEN |= epinten;
    }

    return USB_OK;
}

V3.3.2:
1.
usb_status usb_transc0_active(usb_core_driver *udev, usb_transc *transc)
{
    __IO uint32_t *reg_addr = NULL;

    uint8_t enum_speed = ((udev->regs.dr->DSTAT & DSTAT_ES) >> 1U);

    /* get the endpoint number */
    uint8_t ep_num = transc->ep_addr.num;

    if(ep_num) {
        /* not endpoint 0 */
        return USB_FAIL;
    }

    if(transc->ep_addr.dir) {
        reg_addr = &udev->regs.er_in[0]->DIEPCTL;
    } else {
        reg_addr = &udev->regs.er_out[0]->DOEPCTL;
    }

    /* endpoint 0 is activated after USB clock is enabled */
    *reg_addr &= ~(DEPCTL_MPL | DEPCTL_EPTYPE | DIEPCTL_TXFNUM);

    /* set endpoint 0 maximum packet length */
    *reg_addr |= EP0_MAXLEN[enum_speed];

    /* activate endpoint */
    *reg_addr |= ((uint32_t)transc->ep_type << 18U) | ((uint32_t)ep_num << 22U) | DEPCTL_SD0PID | DEPCTL_EPACT;

    return USB_OK;
}
2.
usb_status usb_transc_active(usb_core_driver *udev, usb_transc *transc)
{
    __IO uint32_t *reg_addr = NULL;
    uint32_t epinten = 0U;
    uint8_t enum_speed = ((udev->regs.dr->DSTAT & DSTAT_ES) >> 1U);

    /* get the endpoint number */
    uint8_t ep_num = transc->ep_addr.num;

    /* enable endpoint interrupt number */
    if(transc->ep_addr.dir) {
        reg_addr = &udev->regs.er_in[ep_num]->DIEPCTL;

        epinten = 1U << ep_num;
    } else {
        reg_addr = &udev->regs.er_out[ep_num]->DOEPCTL;

        epinten = 1U << (16U + ep_num);
    }

    /* if the endpoint is not active, need change the endpoint control register */
    if(!(*reg_addr & DEPCTL_EPACT)) {
        *reg_addr &= ~(DEPCTL_MPL | DEPCTL_EPTYPE | DIEPCTL_TXFNUM);

        /* set endpoint maximum packet length */
        if(0U == ep_num) {
            *reg_addr |= EP0_MAXLEN[enum_speed];
        } else {
            *reg_addr |= transc->max_len;
        }

        /* activate endpoint */
        *reg_addr |= ((uint32_t)transc->ep_type << 18U) | ((uint32_t)ep_num << 22U) | DEPCTL_SD0PID | DEPCTL_EPACT;
    }

#ifdef USB_HS_DEDICATED_EP1_ENABLED
    if((1U == ep_num) && (USB_CORE_ENUM_HS == udev->bp.core_enum)) {
        udev->regs.dr->DEP1INTEN |= epinten;
    } else
#endif /* USB_HS_DEDICATED_EP1_ENABLED */
    {
        /* enable the interrupts for this endpoint */
        udev->regs.dr->DAEPINTEN |= epinten;
    }

    return USB_OK;
}
_________________________________________________________________________________________________________________________

_____________________USBFS________________________________________________________________________________________________

_____________________________________________________________________________________________________________________

______________________USBHS_______________________________________________________________________________________________
../Firmware/GD32f4xx_usb_library/driver/Source/drv_usbh_int.c
fix reason:
In the host file drv_usbh_int.c, the handling of the out channel causes usb_pp_halt to be executed twice. 
Remove the redundant usb_pp_halt function.
V3.3.1:
static uint32_t usbh_int_pipe_out(usb_core_driver *udev, uint32_t pp_num)
{
    usbh_host *uhost = udev->host.data;
    usb_pr *pp_reg = udev->regs.pr[pp_num];
    usb_pipe *pp = &udev->host.pipe[pp_num];
    uint32_t intr_pp = pp_reg->HCHINTF;
    intr_pp &= pp_reg->HCHINTEN;

    if(intr_pp & HCHINTF_ACK) {
        if(1U == udev->host.pipe[pp_num].do_ping) {
            udev->host.pipe[pp_num].do_ping = 0U;
            pp->err_count = 0U;
            usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_ACK, PIPE_NAK);
        }

        pp_reg->HCHINTF = HCHINTF_ACK;
    } else if(intr_pp & HCHINTF_STALL) {
        usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_STALL, PIPE_STALL);
    } else if(intr_pp & HCHINTF_DTER) {
        usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_DTER, PIPE_DTGERR);
        pp_reg->HCHINTF = HCHINTF_NAK;
    } else if(intr_pp & HCHINTF_REQOVR) {
        usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_REQOVR, PIPE_REQOVR);
    } else if(intr_pp & HCHINTF_TF) {
        pp->err_count = 0U;
        usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_TF, PIPE_XF);
    } else if(intr_pp & HCHINTF_NAK) {
        if(0U == udev->host.pipe[pp_num].do_ping) {
            if(1U == udev->host.pipe[pp_num].supp_ping) {
                udev->host.pipe[pp_num].do_ping = 1U;
            }
        }

        pp->err_count = 0U;
        if(USB_USE_FIFO == udev->bp.transfer_mode) {
            usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_NAK, PIPE_NAK);
        } else {
            pp_reg->HCHINTF = HCHINTF_NAK;
        }
        usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_NAK, PIPE_NAK);
    } else if(intr_pp & HCHINTF_USBER) {
        pp->err_count++;
        usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_USBER, PIPE_TRACERR);
    } else if(intr_pp & HCHINTF_NYET) {
        if(CTL_STATUS_OUT != uhost->control.ctl_state) {
            if(0U == udev->host.pipe[pp_num].do_ping) {
                if(1U == udev->host.pipe[pp_num].supp_ping) {
                    udev->host.pipe[pp_num].do_ping = 1U;
                }
            }

            usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_NYET, PIPE_NYET);
        } else {
            usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_NYET, PIPE_XF);
        }

        pp->err_count = 0U;
    } else if(intr_pp & HCHINTF_CH) {
        udev->regs.pr[pp_num]->HCHINTEN &= ~HCHINTEN_CHIE;

        switch(pp->pp_status) {
        case PIPE_XF:
            pp->urb_state = URB_DONE;

            if((uint8_t)USB_EPTYPE_BULK == ((pp_reg->HCHCTL & HCHCTL_EPTYPE) >> 18)) {
                pp->data_toggle_out ^= 1U;
            }
            break;

        case PIPE_NAK:
            pp->urb_state = URB_NOTREADY;
            break;
        case PIPE_NYET:
            pp->urb_state = URB_DONE;

            if((uint8_t)USB_EPTYPE_BULK == ((pp_reg->HCHCTL & HCHCTL_EPTYPE) >> 18)) {
                pp->data_toggle_out ^= 1U;
            }
            break;

        case PIPE_STALL:
            pp->urb_state = URB_STALL;
            break;

        case PIPE_TRACERR:
            if(3U == pp->err_count) {
                pp->urb_state = URB_ERROR;
                pp->err_count = 0U;
            }
            break;

        case PIPE_IDLE:
        case PIPE_HALTED:
        case PIPE_BBERR:
        case PIPE_REQOVR:
        case PIPE_DTGERR:
        default:
            break;
        }

        pp_reg->HCHINTF = HCHINTF_CH;
    } else {
        /* no operation */
    }

    return 1U;
}
V3.3.2
static uint32_t usbh_int_pipe_out(usb_core_driver *udev, uint32_t pp_num)
{
    usbh_host *uhost = udev->host.data;
    usb_pr *pp_reg = udev->regs.pr[pp_num];
    usb_pipe *pp = &udev->host.pipe[pp_num];
    uint32_t intr_pp = pp_reg->HCHINTF;
    intr_pp &= pp_reg->HCHINTEN;

    if(intr_pp & HCHINTF_ACK) {
        if(1U == udev->host.pipe[pp_num].do_ping) {
            udev->host.pipe[pp_num].do_ping = 0U;
            pp->err_count = 0U;
            usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_ACK, PIPE_NAK);
        }

        pp_reg->HCHINTF = HCHINTF_ACK;
    } else if(intr_pp & HCHINTF_STALL) {
        usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_STALL, PIPE_STALL);
    } else if(intr_pp & HCHINTF_DTER) {
        usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_DTER, PIPE_DTGERR);
        pp_reg->HCHINTF = HCHINTF_NAK;
    } else if(intr_pp & HCHINTF_REQOVR) {
        usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_REQOVR, PIPE_REQOVR);
    } else if(intr_pp & HCHINTF_TF) {
        pp->err_count = 0U;
        usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_TF, PIPE_XF);
    } else if(intr_pp & HCHINTF_NAK) {
        if(0U == udev->host.pipe[pp_num].do_ping) {
            if(1U == udev->host.pipe[pp_num].supp_ping) {
                udev->host.pipe[pp_num].do_ping = 1U;
            }
        }

        pp->err_count = 0U;
        if(USB_USE_FIFO == udev->bp.transfer_mode) {
            usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_NAK, PIPE_NAK);
        } else {
            pp_reg->HCHINTF = HCHINTF_NAK;
        }
    } else if(intr_pp & HCHINTF_USBER) {
        pp->err_count++;
        usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_USBER, PIPE_TRACERR);
    } else if(intr_pp & HCHINTF_NYET) {
        if(CTL_STATUS_OUT != uhost->control.ctl_state) {
            if(0U == udev->host.pipe[pp_num].do_ping) {
                if(1U == udev->host.pipe[pp_num].supp_ping) {
                    udev->host.pipe[pp_num].do_ping = 1U;
                }
            }

            usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_NYET, PIPE_NYET);
        } else {
            usb_pp_halt(udev, (uint8_t)pp_num, HCHINTF_NYET, PIPE_XF);
        }

        pp->err_count = 0U;
    } else if(intr_pp & HCHINTF_CH) {
        udev->regs.pr[pp_num]->HCHINTEN &= ~HCHINTEN_CHIE;

        switch(pp->pp_status) {
        case PIPE_XF:
            pp->urb_state = URB_DONE;

            if((uint8_t)USB_EPTYPE_BULK == ((pp_reg->HCHCTL & HCHCTL_EPTYPE) >> 18)) {
                pp->data_toggle_out ^= 1U;
            }
            break;

        case PIPE_NAK:
            pp->urb_state = URB_NOTREADY;
            break;
        case PIPE_NYET:
            pp->urb_state = URB_DONE;

            if((uint8_t)USB_EPTYPE_BULK == ((pp_reg->HCHCTL & HCHCTL_EPTYPE) >> 18)) {
                pp->data_toggle_out ^= 1U;
            }
            break;

        case PIPE_STALL:
            pp->urb_state = URB_STALL;
            break;

        case PIPE_TRACERR:
            if(3U == pp->err_count) {
                pp->urb_state = URB_ERROR;
                pp->err_count = 0U;
            }
            break;

        case PIPE_IDLE:
        case PIPE_HALTED:
        case PIPE_BBERR:
        case PIPE_REQOVR:
        case PIPE_DTGERR:
        default:
            break;
        }

        pp_reg->HCHINTF = HCHINTF_CH;
    } else {
        /* no operation */
    }

    return 1U;
}
________________________________________________________________________________________________________________________
 
______________________VREF________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________WDGT________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________WIFI________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

